Applied Formal Verification by Douglas Perry
For Digital Circuit Design (Electronic Engineering)

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Synopsis

Formal verification is a powerful new digital design method. In this cutting-edge tutorial, two of the field's best known authors team up to show designers how to efficiently apply Formal Verification, along with hardware description languages like Verilog and VHDL, to more efficiently solve real-world design problems.
 

About Douglas Perry

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DOUGLAS PERRY is an award-winning writer whose work has appeared in the Chicago Tribune, The San Jose Mercury News, The Oregonian, and Details. He is the online features editor for The Oregonian and the coauthor of The Sixteenth Minute: Life in the Aftermath of Fame. He lives in Portland, Oregon.
 
Published April 29, 2005 by McGraw-Hill Education. 240 pages
Genres: . Non-fiction